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AN EXPERIMENTAL APPROACH TO VLSI SYSTEM DESIGN
First Edition, December 2017 : Size : A4
ISBN-13 : 978-93-86258-85-4 : Pages : vi+188
Code No. : VSRDAPEECE-108 : Price : Rs. 277.00
PRINTED IN SINGLE COLOUR : Export Price : US $ 28.00

Mr. N. Bala Dastagiri
Bala Dastagiri N. was born in Proddatur, A.P. India. He did his B.Tech. in Electronics and Communication Engineering from JNTU Anantapur and M.Tech. in VLSI Design from Hindustan University Chennai. Presently, he is an Assistant Professor in the Department of Electronics and Communication Engineering at AITS, Rajampet, India and pursuing Ph.D. from Koneru Lakshmaiah Educational Foundation, Guntur, Andhra Pradesh, INDIA, where he has been engaged in Teaching, Research and Development. Previously he was with TRIDENT Tech Labs Pvt. Ltd under the capacity of Application Engineer-EDA. He acted as resource person for the various workshops on VLSI across A.P. India. He has published good number of papers in SCOPUS/SCI Indexed Journals and in IEEE Conferences. His research interests include Analog and Mixed Signal VLSI Circuits and Low Power VLSI.

Dr. K. Hari Kishore
Dr. Hari Kishore Kakarla was born in Vijayawada, Krishna (Dist.), Andhra Pradesh, India. He received B.Tech. in Electronics and Communication Engineering from, JNTU, Hyderabad, Andhra Pradesh, India, M.Tech. from SKD University, Anantapur, Andhra Pradesh, India. He is completed Ph.D. in the area of VLSI in KL University, Vijayawada, Andhra Pradesh, India. Presently he is working as Professor, Department of Electronics and Communication Engineering, KL University, Guntur, Andhra Pradesh, India, where he has been engaged in teaching, research and development of Digital Testing, Low-Power VLSI, High-speed CMOS VLSI, System on Chip, Memory Processors, ASIC Fault Testing, Embedded Systems and Nanotechnology. He has published more than 50 International Journals and participated in 04 IEEE Conference. He is a life member of MISTE, AMIE, MIACSIT, MIAENG and MUACEE.

Mr. Shaik Nazeer Hussain
Shaik Nazeer Hussain was born in Nandalur, A.P. India. He did his B.Tech. in Electronics and Communication Engineering from JNTU Anantapur and M.Tech in VLSI Design from Annamacharya Institute of Technology and Sciences, Rajampet, JNTU Anantapur. Presently, he is an assistant professor in the Department of Electronics and communication Engineering at AITS, Rajampet, India and pursuing Ph.D. from Koneru Lakshmaiah Educational Foundation, Guntur, Andhra Pradesh, INDIA, where he has been engaged in Teaching, Research and Development. He has published good number of papers in SCOPUS/SCI Indexed Journals and in IEEE Conferences. His research interests include ASIC design, VLSI System Design Circuits and Low Power VLSI.

Mr. Avinash Yadlapti
Avinash Yadlapati has 16+ years of Industry Experience in the field of VLSI Design and Verification. He is currently associated with Infosys Ltd (www.infosys.com) from April 2017. He is working as Principal Consultant in the Semiconductor division at Infosys where he is handling the Hyderabad VLSI Team of about 50 Engineers. Prior to that he worked with different companies like Cyient, eInfochips, AMD, Qualcomm and Synopsys He is having wide hands-on experience in the areas of RTL Coding, Verification, Synthesis, STA and Design For Test, Avinash Yadlapati holds an M.Tech (VLSI) from KL University and currently pursuing his Ph.D (VLSI) from the same university. His topic of research is Low Power-Design for Test (DFT) Techniques. Apart from his technical interests, he has a strong interest in social reforms and runs an educational trust for economically backward students (especially working for uplifting Girl children). He has strong passion for education and vision of creating a strong education system along with good value system.
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